BH2222FV standard ics 1/7 8bit 20ch d/a converter BH2222FV BH2222FV is an 8bit d/a converter for electronic adjustment. the 20-channel output voltage can be independently controlled by three-wire serial interface from micro-controller. the built-in power on reset circuit keeps the output state low after the power is on. 4-channel have data register function. two kinds of set voltage can be retained, and output voltage can be switched by sel pin. ! ! ! ! applications the voltage adjustment for dvc, dsc etc. ! ! ! ! features 1) 8bit 20-channel d/a converters adopting r-2r system. 2) 3-wire + 1-wire 16-bit serial interface. 3) power on reset circuit. 4) the full scale output voltage range : 2.7 ~ 5.5v. 5) it is possible to set the two output full scale level independently. 6) 4-channel date register extension function. 7) ssop-b28 package. ! ! ! ! absolute maximum ratings (ta=25 c) parameter symbol limits unit power supply voltage v cc ? 0.3~ + 7.0 v maximum output voltage v in ? 0.3~v cc v storage temperature tstg ? 55~ + 125 c power dissipation pd 640 mw ? reduced by 6.4mw for each increase in ta of 1 c over 25 c. this product is not designed for protection against radioactive rays. ? ! ! ! ! recommended operating conditions (ta=25 c) parameter symbol typ. max. unit v cc supply voltage v cc ? 5.5 v ? 1.0 analog output source current i ol ma ? 1.0 ma analog output sink current i oh ? 85 c operating temperature range topr ? 0.47 limit load capacitance please set to v cc v dd 1, v dd 2. cl f min. 4.5 v dd 2 supply voltage v dd 2 ? v cc v 2.7 v dd 1 supply voltage v dd 1 ? v cc v 2.7 ? ? ? 20 ? ? 1.0 ? clock frequency fsclk mhz
BH2222FV standard ics 2/7 ! ! ! ! block diagram 1 2 3 4 5 6 7 8 9 10 11 12 13 14 18 17 16 15 28 27 26 25 24 23 22 21 20 19 r-2r dac r-2r dac 8bitreg + dec 8bitreg + dec r-2r dac r-2r dac 8bitreg + dec 8bitreg + dec r-2r dac r-2r dac 8bitreg + dec 8bitreg + dec r-2r dac r-2r dac r-2r dac r-2r dac exd 8bitreg + dec r-2r dac r-2r dac 8bitreg + dec 8bitreg + dec r-2r dac r-2r dac 8bitreg + dec 8bitreg + dec r-2r dac r-2r dac 8bitreg + dec 8bitreg + dec r-2r dac r-2r dac 8bitreg + dec 8bitreg + dec r-2r dac r-2r dac 8bitreg + dec 8bitreg + dec serial interface power_on reset v cc v dd1 v dd1 v dd1 v dd2 v dd2 v dd2 v cc v cc v cc v cc clk di ex4 ex3 ao16 ao15 ao14 ao13 ao12 ao11 ao10 ao9 sel ld v cc v dd2 ex1 ex2 ao1 ao2 ao3 ao4 ao5 ao6 ao7 ao8 v dd1 gnd exd 8bitreg + dec exd 8bitreg + dec exd 8bitreg + dec
BH2222FV standard ics 3/7 ! ! ! ! pin descriptions v cc pin name functions power supply pin v dd 2 power supply pin power supply pin common gnd pin ex1 analog output pins (register extension) analog output pins (register extension) ex2 analog output pins analog output pins ao1 ao2 ao3 ao4 ao5 ao6 ao7 ao8 v dd 1 gnd ld serial load input pin serial data input pin serial clock input pin sel select extended data register pin ao9 ao10 ao11 ao12 ao13 ao14 ao15 pin no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 ao16 ex3 ex4 di clk ? in / out ? out out out out out out out out out out ? ? in in out out out out out out out out out out in in ? power supply ? v dd 2 v dd 2 v dd 2 v dd 2 v dd 2 v dd 1 v dd 1 v dd 1 v dd 1 v dd 1 ? ? ? ? v dd 1 v dd 1 v dd 1 v dd 1 v dd 1 v dd 2 v dd 2 v dd 2 v dd 2 v dd 2 ? ?
BH2222FV standard ics 4/7 ! ! ! ! electrical characteristics (unless otherwise noted, ta=25 c, v cc =v dd 2=5.0v, v dd 1=3.0v, r l =open, c l =0pf) parameter symbol min. typ. max. unit conditions < operating current > ( 80h set) v cc system v dd 1 system v dd 2 system < logic interface > input low voltage input high voltage input low current input high current < buffer amplifier > minimum output voltage maximum output voltage < dac accuracy > resolution differential nonlinearity error nonlinearity error i cc i dd1 i dd2 v il v ih i il i ih zs1 zs2 zs3 fs1 fs2 fs3 res dnl inl ? ? ? gnd 2.4 ? ? gnd gnd gnd v cc ? 0.1 v cc ? 0.2 v cc ? 0.3 ? ? 1.0 ? 1.5 1.1 1.0 1.5 ? ? ? ? ? ? ? ? ? ? 8 ? ? 2.5 2.0 3.0 0.6 v cc 10 10 0.1 0.2 0.3 v cc v cc v cc ? 1.0 1.5 ma ma ma v v a a v v v v v v bit lsb lsb clk=1mhz 00h set i oh =0.0ma 00h set i oh =0.5ma 00h set i oh =1.0ma ffh set i ol =0.0ma ffh set i ol =0.5ma ffh set i ol =1.0ma input code 02h~fdh input code 02h~fdh ! ! ! ! circuit operation (1) power on reset this lsi has a power on reset circuit that sets an analog output to low level in v cc power stand-up. please be sure that the time constant meets below condition, because the output is undefined when v cc power stand up too rapidly. power on reset voltage vpor v ? 2.1 ? v cc =0 4.5v v cc supply voltage rise time trv cc 10 ms ?? parameter conditions symbol min. typ. max. unit
BH2222FV standard ics 5/7 (2) conditions of operating timing (unless otherwise noted,ta=25 c, v cc =5.0v, v dd 1=3.0v, v dd 2=5.0v) parameter conditions ld hold time c l =50pf, r l =10k ? clk l level pulse width clk h level pulse width ld "h" level pulse width di setup time di hold time analog output delay time ld setup time symbol t clkl t clkh ts di ts ld th di th ld t ldh t out ? ? ? ? ? ? ? ? ? 30 200 200 60 200 100 100 min. typ. ? ? ? ? ? ? ? 200 max. unit s ns ns ns ns ns ns ns clk di ld output ts di last data th di t clkh t clkl t ldh th ld ts ld t out
BH2222FV standard ics 6/7 (3) command sending control command is 3+1wire 16bit serial interface. (lsb first) data is taken in with the rise edge of the clk and output data is fixed in the ld high section. data is maintained in the ld low section. please change sel mode in the ld low section. analog output voltage level data set channel select gnd (v dd 1, 2-gnd) / 256 1 (v dd 1, 2-gnd) / 256 2 ((v dd 1, 2-gnd) / 256 254 ((v dd 1, 2-gnd) / 256 255 0 0 0 1 1 d15 0 0 0 1 1 d14 d15 msb (last) ? data set ? channel select lsb (first) d14 d13 d12 d11 d10 d9 d8 d7 d6 0 0 0 1 1 d13 0 0 0 1 1 d12 0 0 0 1 1 d11 0 0 0 1 1 d10 0 0 1 1 1 d9 0 1 0 0 1 d8 d5 d4 d3 d2 d1 d0 function sel output pin don't care ao1 ao16 ex1_0 ex4_0 ex1_1 ex4_1 don't care : don't care don't care ao1 ao16 ex1 ex4 ex1 ex4 d7 d6 d5 0 0 1 1 d4 0 0 0 0 d3 0 0 0 0 d2 0 0 0 00 d1 0 1 0 1 10100 10101 0 1 11 1 000 11001 11111 d0
BH2222FV standard ics 7/7 ! ! ! ! operation notes (1) regarding to the dnl & inl this item is guaranteed under below condition. input code 02h fdh (2) regarding to the early stage condition with the power on reset, the output is fixed to low level in power stand-up. but the output is undefined when only ld signal is inputted. input the ld signal after setting data. (3) regarding to the setting of the each voltage set the v cc , v dd 1, v dd 2 to become the following condition. when not satisfied, unnecessary current flows. v cc v dd 1, v dd 2 (4) regarding to the power on reset function this function operates detecting the voltage level of the v cc . so, if the voltage level of the v cc become less than power on reset voltage when working, it is a possibility that the outputs become reset condition. ! ! ! ! external dimensions (units : mm) ssop-b28 0.15 0.1 0.1 1.15 0.1 1 0.65 7.6 0.3 5.6 0.2 28 10.0 0.2 0.3min. 14 15 0.22 0.1 0.1
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